Daeyeon Kim

Contact Information:

2435 EECS
1301 Beal Ave
Ann Arbor, MI 48109
daeyeonk@umich.edu

Website

 

Research Interest:

Robust Low Voltage Memories for Yield-Aware Low Power SoC Design

Current Research:

– Design Custom SRAM Bitcells 
– Investigate SRAM Yield Optimization Analysis 
– Develop SRAM Read/Write Assist Circuits 
– Work on SRAMs Using Newly Developed Devices 
– Work on Memory Compilers