Yiqun Zhang

Contact Information:

EECS 2435
1301 Beal Avenue
Ann Arbor, MI 48109-2122
zhyiqun@umich.edu 
website: web.eecs.umich.edu/~zhyiqun

 

Research Interest:

Error resilient circuit, hardware security, in-memory computing

Current Research:

I am currently working on a new type of Razor design, that detects and corrects the timing error. The design is targeting at smaller overhead and larger timing speculation window. It will be implemented on a complete, commercial processor without knowing its internal architecture, which shows automated capability of this technique.