Brian Cline

Contact Information:

4844 CSE
2260 Hayward
Ann Arbor, MI 48109-2121
Ph: 734-763-3309
btcline@umich.edu

 

Research Interest:

VLSI circuit design, Low power design, High performance architecture design, DFM, Statistical Timing Analysis.

Current Research:

I’m currently involved in developing a statistical timing tool that incorporates CD variation (both intra- and inter-die) due to manufacturing steps such as etch and lithography.