Short Bio

David Blaauw received his B.S. from Duke University in 1986 and his Ph.D. from the University of Illinois, Urbana, in 1991. From 1993 until August 2001, he worked for Motorola, Inc. in Austin, TX, where he was the manager of the High Performance Design Technology group. Since August 2001, he has been on the faculty at the University of Michigan as a full Professor. His work has focused on VLSI design with particular emphasis on ultra-low power design, millimeter scale sensor nodes, high performance accelerators for cognitive and image processing and adaptive design. He has published over 550 papers and holds 60 patents. He is an IEEE fellow and a member of the IEEE International Solid-State Circuit Conference (ISSCC) technical program committee.

Millimeter Sensor Design and Mixed-Signal and RF Circuits

One area of Blaauw’s most recent work has focused on ultra-low power sensor systems for the Internet of Things (IoT). By reducing the average power consumption of sensor electronics from uW to the nW range, his team has made it possible to reduce the size of the battery and energy harvesting to only a couple millimeters. Combined with their new techniques for radio communication with mm-scale antennae [1, 2] and DC-DC conversion using only on-chip components [3, 4], they have been able to construct the first complete and functional millimeter-scale sensor node systems. Their first system was an intra-ocular pressure sensor measuring only ~1mm on the side, created in 2011 [5]. Since that time, they have expanded their systems to incorporated a commercial ARM Cortex M0 processor with low leakage memory [13], ultra-low power flash [6] and a number of different sensing modalities, including imaging [7], audio [8], pressure [10], ECG[11] and temperature [12] sensing. These systems typically measure a couple millimeters in size, are fully programmable with processor and memory, operate for several weeks on the integrated battery alone and become energy autonomous with energy harvesting [14]. The team’s work is currently featured at the Computer History Museum in California as the world’s “smallest computer.” This research required that all parts of a computing system be re-architected, including voltage regulation (DC-DC conversion) [3, 15], harvesting [4], timers[16], references [17], analog front ends such as analog-to-digital conversion (ADC) [38], capacitance-to-digital conversion (CDC) [18], imaging [7], audio [9], RF design [1, 2] and even low leakage ESD pads [19]. They have found that the application space of such millimeter computing systems is practically unlimited. They are currently working actively with other researchers to deploy their sensors for butterfly tracking, “down-hole” oil-reservoir exploration and medical implantable applications as well as commercializing the technology.

High Performance Accelerators for Image Processing and Deep Learning

In the area of high performance computing, Blaauw’s recent work has focused on hardware acceleration for image processing [20, 39] and deep learning/neural networks [21]. A particularly interesting approach his team has been pursuing of late is the use of so-called “in memory” computing or “bit-line” computing where calculations are performed directly on the bit lines in the SRAM itself [22, 23, 24]. This avoids the need to move data from memories to compute units/cores, thereby greatly reducing power consumption while opening up enormous parallelism presented by the large number of memory arrays in a processor. 

Low Power and Subthreshold Design

Blaauw has had a long research agenda in low power design. He introduced the concept of the “energy optimal voltage” (Vopt) in 2004 (DAC) [25] together with his student Bo Zhai and colleague Dennis Sylvester. At Vopt voltage, the energy per operation reaches a minimum, and further reduction of the supply voltage increases the leakage energy more quickly than the dynamic energy reduces. Their paper was the first to formulate analytical expressions for the value of Vopt and explore its dependence on circuit switching activity and process parameters. Typically, Vopt lies below the threshold voltage, leading to the need for subthreshold design. Blaauw and Sylvester’s research team spent the following years developing ultra-low power sensor systems using subthreshold design. This led to numerous publications, including new, ultra-low voltage SRAM designs [26, 27], subthreshold processor architectures [28, 29] and signal processing using “super pipelining” to further reduce the Vopt point. [30]

Near-Threshold Design for Throughput Limited Computing

In addition, Blaauw applied these low power techniques to throughput limited, high-performance computing found in data centers. Together with Professors Mudge and Sylvester, they were the first to introduced the concept of “near threshold computing” (NTC) in 2007 (ISLPED) [31]. For throughput constrained, parallelizable applications, NTC operates at the optimal trade-off between the energy efficiency gained through low voltage operation and performance gain from operating at a higher voltage. Their papers found that for parallelizable workloads, the optimal point occurs at a supply voltage that is ~200mV above the threshold voltage of the technology (i.e., “near” the threshold voltage) [40, 41]. This approach has been widely adopted in the industry (e.g., Intel’s ‘NTV’) and has led to new investigations by Blaauw’s research team into low voltage design for chip multiprocessors, including novel high radix routers to connect chip multiprocessors with memory [32] and investigation into 3D multiprocessor designs [33].

Adaptive Design and Razor Techniques

In the area of adaptive design, Blaauw introduced a new approach called Razor in 2003 (MICRO) [34] where processor chips automatically tune their frequency or supply voltage to the point of failure, thereby eliminating wasteful design margins. By adding low-overhead delay error detection and correction circuits, Razor automatically tunes the processor to operate at the point where failures start to occur (which subsequently are automatically corrected), indicating that all margins are removed. As the chip experiences different environmental conditions, such as temperature and supply voltage changes or aging effects, Razor automatically tracks the innate performance of the design by maintaining a low error rate. Razor was implemented in several test chips, showing as much as 50% power reduction and 30% performance improvement [35, 42, 43, 44] . It spawned significant additional research in related approaches by industry and academic researchers, and the key papers [34, 35, 36, 37] have been referenced over 2,000 times. In addition, Blaauw has investigated other areas of adaptive design, such as methods for in situ detection and management of aging based oxide-breakdown and NBTI degradation [45, 46].  

References

  1. Li-Xuan Chuo, Yao Shi, Zhihong Luo, Nikolaos Chiotellis, Zhiyoong Foo, Gyouho Kim, Yejoong Kim, Anthony Grbic, David Wentzloff, Hun-Seok Kim, David Blaauw, “A 915MHz Asymmetric Radio Using Q-Enhanced Amplifier for a Fully Integrated 3×3mm3 Wireless Sensor Node with 20m Non-Line-of-Sight Communication,” IEEE International Solid-State Circuits Conference (ISSCC), February 2017 [PDF]
  2. Yao Shi, Myungjoon Choi, Ziyun Li, Zhihong Luo, Gyouho Kim, Zhiyoong Foo, Hun-Seok Kim, David Wentzloff, David Blaauw, “A 10mm³ Inductive-Coupling Near-Field Radio for Syringe-Implantable Smart Sensor Nodes,” IEEE Journal of Solid State Circuits (JSSC), Vol. 51, No. 11, September 2016, pgs. 2570-2583 [PDF]
  3. Wanyeong Jung, Junhua Gu, Paul D. Myers, Minseob Shim, Seokhyeon Jeong, Kaiyuan Yang, Myungjoon Choi, ZhiYoong Foo, Suyoung Bang, Sechang Oh, Dennis Sylvester, David Blaauw,” A 60%-Efficiency 20nW-500μW Tri-Output Fully Integrated Power Management Unit with Environmental Adaptation and Load-Proportional Biasing for IoT Systems,” IEEE International Solid-State Circuits Conference (ISSCC), February 2016 [PDF]
  4. Wanyeong Jung, Sechang Oh, Suyoung Bang, Yoonmyung Lee, Dennis Sylvester, David Blaauw, “A 3nW Fully Integrated Energy Harvester Based on Self-Oscillating Switched-Capacitor DC-DC Converter,” IEEE International Solid-State Circuits Conference (ISSCC), Invited Paper to the IEEE Journal of Solid-State Circuits (JSSC), Special Issue on ISSCC, February 2014 [PDF]
  5. Gregory Chen, Hassan Ghaed, Razi-Ul Haque, Michael Wieckowski, Yejoong Kim, Gyouho Kim, David Fick, Daeyeon Kim, Mingoo Seok, Kensall Wise, David Blaauw, Dennis Sylvester, “A 1 Cubic Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor,” IEEE International Solid-State Circuits Conference (ISSCC), February 2011 [PDF]
  6. Qing Dong, Yejoong Kim, Inhee Lee, Myungjoon Choi, Ziyun Li, Jingcheng Wang, Kaiyuan Yang, Yen-Po Chen, Junjie Dong, Minchang Cho, Gyouho Kim, Wei-Keng Chang, Yun-ShengChen, Yu-Der Chih, David Blaauw, Dennis Sylvester, “A 1Mb Embedded NOR Flash Memory with 39μW Program Power for mm-Scale High-Temperature Sensor Nodes,” EEE International Solid-State Circuits Conference (ISSCC), February 2017[PDF] 
  7. Gyouho Kim, Mahmood Barangi, Zhiyoong Foo, Nathaniel Pinckney, Suyoung Bang, David Blaauw, Dennis Sylvester, “A 467nW CMOS Visual Motion Sensor with Temporal Averaging and Pixel Aggregation,” IEEE International Solid-State Circuits Conference (ISSCC), February 2013[PDF]
  8. Minchang Cho, Sechang Oh, Seokhyeon Jeong, Yiqun Zhang, Inhee Lee, Yejoong Kim, Li-Xuan Chuo, Dongkwun Kim, Qing Dong, Yen-Po Chen, Martin Lim, Mike Daneman, David Blaauw, Dennis Sylvester, Hun-Seok Kim,A 6×5×4mm3 General Purpose Audio Sensor Node with a 4.7μW Audio Processing IC ,” IEEE Symposium on VLSI Circuits (VLSI-Symp), June 2017[PDF]
  9. Sechang Oh, Taekwang Jang, Kyojin D. Choo, David Blaauw, Dennis Sylvester, “A 4.7µW Switched-Bias MEMS Microphone Preamplifier for Ultra-Low-Power Voice Interfaces,” IEEE Symposium on VLSI Circuits (VLSI-Symp), June 2017[PDF]
  10. Sechang Oh, Yao Shi, Gyouho Kim, Yejoong Kim, Taewook Kang, Seokhyeon Jeong, Dennis Sylvester, David Blaauw, “A 2.5nJ Duty-Cycled Bridge-to-Digital Converter Integrated in a 13mm3 Pressure-Sensing System,” IEEE International Solid-State Circuits Conference (ISSCC), February 2018 [PDF]
  11. Dongsuk Jeon, Yen-Po Chen, Yoonmyung Lee, Yejoong Kim, Zhiyoong Foo, Grant Kruger, Hakan Oral, Omer Berenfeld, Zhengya Zhang, David Blaauw, Dennis Sylvester, “An Implantable 64nW ECG-Monitoring Mixed-Signal SoC for Arrhythmia Diagnosis,” IEEE International Solid-State Circuits Conference (ISSCC), Invited Paper to the IEEE Journal of Solid-State Circuits (JSSC), Special Issue on ISSCC, February 2014[PDF]
  12. Kaiyuan Yang, Qing Dong, Wanyeong Jung, Yiqun Zhang, Myungjoon Choi, David Blaauw, Dennis Sylvester, “A 0.6nJ -0.22/+0.19°C Inaccuracy Temperature Sensor Using Exponential Subthreshold Oscillation Dependence,” EEE International Solid-State Circuits Conference (ISSCC), February 2017[PDF]
  13. Mingoo Seok, Scott Hanson, Yu-Shiang Lin, Zhiyoong Foo, Dayeon Kim, Yoonmyung Lee, Nurrachman Liu, Dennis Sylvester, David Blaauw, “The Phoenix Processor: A 30pW Platform for Sensor Applications,” IEEE Symposium on VLSI Circuits (VLSI-Symp), Invited Paper to the IEEE Journal of Solid-State Circuits (JSSC), Special Issue on VLSI Circuits, June 2008[PDF]
  14. Yoonmyung Lee, Suyoung Bang, Inhee Lee, Yejoong Kim, Gyouho Kim, Prabal Dutta, Dennis Sylvester, David Blaauw, “A Modular 1mm³ Die-Stacked Sensing Platform with Low Power I²C Inter-die Communication and Multi-Modal Energy Harvesting,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on ISSCC, Vol. 48, No.1, January 2013, pgs. 229-243[PDF]
  15. Wanyeong Jung, Dennis Sylvester, David Blaauw, “A Rational-Conversion-Ratio Switched-Capacitor DCDC Converter Using Negative-Output Feedback,” IEEE International Solid-State Circuits Conference (ISSCC), February 2016[PDF]
  16. Taekwang Jang, Myungjoon Choi, Seokhyeon Jeong, Suyoung Bang, Dennis Sylvester, David Blaauw, “A 4.7nW 13ppm/°C Self-Biased Wakeup Timer Using a Switched-Resistor Scheme,” IEEE International Solid-State Circuits Conference (ISSCC), February 2016[PDF]
  17. Mingoo Seok, David Blaauw, Dennis Sylvester, Gyouho Kim, “A Portable 2-Transistor Picowatt Temperature-Compensated Voltage Reference Operating at 0.5V,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 47, No. 10, October 2012, pgs. 2534-2545[PDF] 
  18. Wanyeong Jung, Seokhyeon Jeong, Dennis Sylvester, David Blaauw, “A 46.9fJ/c.s, Fully-Digital Capacitance-to-Digital Converter using Iterative Delay-Chain Discharge.” IEEE International Solid-State Circuits Conference (ISSCC), February 2015[PDF]
  19. Yen-Po Chen, Yoonmyung Lee, Jae-Yoon Sim, Massimo Alioto, David Blaauw, “45pW ESD Clamp Circuit for Ultra-Low Power Applications,” IEEE Custom Integrated Circuits Conference (CICC), September 2013[PDF]
  20. Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin Kempke, Luyao Gong, Zhengya Zhang, Ron Dreslinski, David Blaauw, Hun Seok Kim, “A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles ,” IEEE Journal of Solid State Circuits (JSSC), Invited Paper to the Special Issue on ISSCC 2017, 53, No. 1, September 2017, pgs. 76-9[PDF]
  21. Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim, Qing Dong, Yen-Po Chen, Laura Fick, Xun Sun, Ron Dreslinski, Trevor Mudge, Hun Seok Kim, David Blaauw, Dennis Sylvester, “A 288μW Programmable Deep-Learning Processor with 270KB On-Chip Weight Storage Using Non-Uniform Memory Hierarchy for Mobile Intelligence,” IEEE International Solid-State Circuits Conference (ISSCC), February 2017[PDF]
  22. Supreet Jeloka, Naveen Akesh, Dennis Sylvester, and David Blaauw, “A 28nm configurable memory (TCAM / BCAM / SRAM) using push-rule 6T bit cell enabling logic-in-memory,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special issue on VLSI 2015, Vol. 51, No. 4, April 2016, pgs. 1009-1021 [PDF]
  23. Qing Dong, Supreet Jeloka, Mehdi Saligane, Yejoong Kim, Masaru Kawaminami, Akihiko Harada, Satoru Miyoshi, David Blaauw, Dennis Sylvester, “A 0.3V VDDmin 4+2T SRAM for Searching and In-Memory Computing Using 55nm DDC Technology,” IEEE Symposium on VLSI Circuits (VLSI-Symp), Invited Paper to the IEEE Journal of Solid States Circuits (JSSC), Special Issue on VSLI, June 2017 [PDF]
  24. Yiqun Zhang, Li Xu, Jingcheng Wang, Kaiyuan Yang, Qing Dong, Supreet Jeloka, David Blaauw, Dennis Sylvester, “Recryptor: A Reconfigurable In-Memory Cryptographic Cortex-M0 Processor for IoT,” IEEE Symposium on VLSI Circuits (VLSI-Symp), Invited Paper to the IEEE Journal of Solid States Circuits(JSSC), Special Issue on VSLI, June 2017 [PDF]
  25. Bo Zhai, David Blaauw, Dennis Sylvester, Krisztián Flautner, “Theoretical and Practical Limits of Dynamic Voltage Scaling,” ACM/IEEE Design Automation Conference (DAC), June 2004, pg. 868-873 [PDF]
  26. Bo Zhai, David Blaauw, Dennis Sylvester, Scott Hanson, “A sub-200mV 6T SRAM in 130nm CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), Invited Paper to the Special Issue on the 2008 Compound Semi-Conductor Integrated Circuit Symposium (CSICS’08), February 2007 [PDF]
  27. Bo Zhai, Scott Hanson, David Blaauw, Dennis Sylvester, “A Variation-Tolerant Sub-200mV 6-T Subthreshold SRAM,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on the 2008 Compound Semi-Conductor Integrated Circuit Symposium (CSICS’08), 43, No. 10, October 2008, pgs. 2338 – 2348 [PDF]
  28. Bo Zhai, Leyla Nazhandali, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Sanjay Pant, David Blaauw, Todd Austin, “A 2.60pJ/Inst. Subthreshold Sensor Processor for Optimal Energy Efficiency,” IEEE Symposium on VLSI Circuits (VLSI-Symp), June 2006 [PDF]
  29. Scott Hanson, Mingoo Seok, Yu-Shiang Lin, Zhiyoong Foo, Daeyon Kim, Yoonmyung Lee, Nurrachman Liu, Dennis Sylvester, David Blaauw, “A Low-Voltage Processor for Sensing Applications with Picowatt Standby Mode,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on VLSI Circuits, Vol. 44, No. 4, April 2009, pgs. 1145 – 1155 [PDF]
  30. Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester, “A 0.27V, 30MHz, 17.7nJ/transform 1024-pt complex FFT core with super-pipelining,” IEEE International Solid-State Circuits Conference (ISSCC), February 2011 [PDF]
  31. Bo Zhai, Ronald G. Dreslinski, Trevor Mudge, David Blaauw, Dennis Sylvester, “Energy Efficent Near-threshold Chip Multi-processing,” ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), August 2007, Best Paper Nomination [PDF]
  32. Sudhir Satpathy, Korey Sewell, Thomas Manville, Yen-Po Chen, Ronald Dreslinski, Dennis Sylvester, Trevor Mudge, David Blaauw, “A 4.5Tb/s 3.4Tb/sW 64 x 64 Switch Fabric With Self-Updating Least-Recently-Granted Priority and Quality-of-Service Arbitration in 45nm CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), February 2012 [PDF]
  33. David Fick, Ronald G. Dreslinski, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Mathew Fojtik, Sudhir Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory Chen, Trevor Mudge, Dennis Sylvester, David Blaauw, “Centip3De: A 3930 DMIPS/W Configurable Near-Threshold 3D Stacked System with 64 ARM Cortex-M3 Cores,” IEEE International Solid-State Circuits Conference (ISSCC), Invited Paper to the IEEE Journal of Solid-State Circuits (JSSC), Special Issue on ISSCC, February 2012 [PDF]
  34. Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Toan Pham, Rajeev Rao, Conrad Ziesler, David Blaauw, Todd Austin, Trevor Mudge, “Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation,” ACM/IEEE International Symposium on Microarchitecture (MICRO), December 2003, pg. 7-18, Best Paper Award [PDF]
  35. David Blaauw, Sudherssen Kalaiselvan, Kevin Lai, Wei-Hsiang Ma, Sanjay Pant, Carlos Tokunaga, Shidhartha Das, David Bull, “RazorII: In-Situ Error Detection and Correction for PVT and SER tolerance,” IEEE International Solid-State Circuits Conference (ISSCC), Invited Paper to the IEEE Journal of Solid-State Circuits (JSSC), Special Issue on ISSCC, February 2008 [PDF] 
  36. David Bull, Shidhartha Das, Karthik Shivashankar, Ganesh Dasika, Krisztian Flautner, David Blaauw, “A Power-efficient 32bit ARM Processor using Timing-error Detection and Correction for Transient-error Tolerance and Adaptation to PVT Variation,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on ISSCC 2010, Vol. 46, No. 1, January 2011, pgs. 18 – 31 [PDF]
  37. Matthew Fojtik, David Fick, Yejoong Kim, Nathaniel Pinckney, David Harris, David Blaauw, Dennis Sylvester, “Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45nm CMOS Using Architecturally Independent Error Detection and Correction,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on ISSCC, Vol. 48, No. 1, January 2013, pgs. 66-81 [PDF]
  38. Seokhyeon Jeong, Wanyeong Jung, Dongsuk Jeon, Omer Berenfeld, Hakan Oral, Grant Kruger, David Blaauw, Dennis Sylvester, “A 120nW 8b Sub-ranging SAR ADC with Signal-Dependent Charge Recycling for Biomedical Applications,” IEEE Symposium on VLSI Circuits (VLSI-Symp), June 2015 [PDF]
  39. Dongsuk Jeon, Michael Henry, Yejoong Kim, Inhee Lee, Zhengya Zhang, David Blaauw, Dennis Sylvester, “An Energy Efficient Full-Frame Feature Extraction Accelerator with Shift-Latch FIFO in 28nm CMOS,” IEEE Journal of Solid-State Circuits (JSSC), Vol. PP, No. 99, March 2014, pgs. 1-14 [PDF]
  40. Ronald G. Dreslinski, Michael Wieckowski, David Blaauw, Dennis Sylvester, Trevor Mudge, “Near-Threshold Computing: Reclaiming Moore’s Law Through Energy Efficient Integrated Circuits,” Proceedings of the IEEE, Special Issue on Ultra-Low Power Circuit Technology, Vol. 98, No. 2, February 2010, pg. 253 – 266 [PDF]
  41. Nathaniel Pinckney, Korey Sewell, Ronald Dreslinski, Dave Fick, David Blaauw, Dennis Sylvester, Trevor Mudge, “Assessing the Performance of Parallelized Near-Threshold Computing,” ACM/IEEE Design Automation Conference (DAC), June 2012 [PDF]
  42. Shidhartha Das, David Roberts, Seokwoo Lee, Sanjay Pant, David Blaauw, Todd Austin, Krisztián Flautner, Trevor Mudge, “A Self-Tuning DVS Processor using Delay-Error Detection and Correction,” IEEE Journal of Solid-State Circuits (JSSC), Invited Paper to the Special Issue on the 2005 Symposium on VLSI Circuits, Vol. 41, No. 4, April 2006, pg. 792-804. [PDF]
  43. Yiqun Zhang, Mahmood Khayatzadeh, Kaiyuan Yang, Mehdi Saligane, Nathaniel Pinckney, Massimo Alioto, David Blaauw, Dennis Sylvester, “iRazor: 3-Transistor Current-Based Error Detection and Correction in an ARM Cortex-R4 Processor,” IEEE International Solid-State Circuits Conference (ISSCC), February 2016 [PDF]
  44. David Blaauw, Shidhartha Das, “CPU, Heal Thyself,” IEEE Spectrum, August 2009 [PDF]
  45. Prashant Singh, Eric Karl, Dennis Sylvester, David Blaauw, “Compact Degradation Sensors for Monitoring NBTI and Oxide Degradation,” IEEE Transactions on Very Large Scale Integration Systems (T-VLSI), Vol. 20, No. 9, September 2012, 1645-1655 [PDF]
  46. Dennis Sylvester, David Blaauw, Eric Karl, “ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon,” IEEE Design and Test of Computers (D&T), Vol. 23, No. 6, November 2006, pg. 484 – 490 [PDF]